chloe
|
fcfe1dfb4a
|
ptos: ps+hal: Add thread control block init
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-14 16:14:03 -04:00 |
|
chloe
|
7a2aec4e12
|
ptos: ke: Add per-processor scheduler queue + PBI packer
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-14 05:57:11 +00:00 |
|
chloe
|
bb55a52b69
|
ptos/amd64: Add task state segment
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-13 23:27:01 -04:00 |
|
chloe
|
4165241b6f
|
stos/amd64: cpu: Add LAPIC driver + MCB in KPCR
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-13 22:26:21 -04:00 |
|
chloe
|
895521c510
|
ptos: Initialize per-processor pool regions
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-13 18:35:39 -04:00 |
|
chloe
|
7a8fbe7025
|
ptos/amd64: cpu: Add HalKpcrCurrent()
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-13 18:13:25 -04:00 |
|
chloe
|
2081b15219
|
ptos/amd64+hal: intr: Add IRQL managmenet
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-13 03:54:22 +00:00 |
|
chloe
|
b1f30e1f72
|
ptos/amd64: cpu: Add high-level interrupt registration
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-12 23:23:43 -04:00 |
|
chloe
|
ffe001821c
|
ptos: vm: Initialize valloc range + zero pagemap lvls
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 20:27:07 -04:00 |
|
chloe
|
a9f411b750
|
ptos/amd64: mmu: Zero each new pagemap level
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 20:16:37 -04:00 |
|
chloe
|
e03a6d0e91
|
ptos/amd64+hal: Add page unmap interface
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 05:18:36 -04:00 |
|
chloe
|
3593c66e3d
|
ptos/amd64+hal: Add page mapping interface
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 05:15:49 -04:00 |
|
chloe
|
7cb153f98c
|
ptos/amd64+hal: Add interrupt handling + P1 KPCR init
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-11 04:46:00 +00:00 |
|
chloe
|
7153b91579
|
ptos/amd64: Add i8254 driver
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 00:23:59 -04:00 |
|
chloe
|
9c91a4d8e3
|
ptos/amd64+ke: Add bugcheck support
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 00:21:45 -04:00 |
|
chloe
|
027074d548
|
ptos/amd64: cpu: Add interrupt descriptor table
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-11 03:08:00 +00:00 |
|
chloe
|
eb009076b2
|
ptos/amd64: mmu: Add virtual address space helpers
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 21:02:57 -04:00 |
|
chloe
|
d21050c1e6
|
ptos/amd64: platform: Add UART driver + HAL interface
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 05:22:51 +00:00 |
|
chloe
|
e9bb671781
|
ptos: build: Link and include against spkg
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 04:07:03 +00:00 |
|
chloe
|
81ee834a99
|
ptos: ke: Add kernel C groundwork
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 01:38:43 +00:00 |
|
chloe
|
1fb8f3368a
|
ptos/amd64: cpu: Load our own GDT
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-09 21:16:18 -04:00 |
|
chloe
|
662252ae18
|
build: Add build pipeline groundwork
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 01:10:15 +00:00 |
|