 chloe
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fd056425ae
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ptos/amd64: cpu: Implement context switch groundwork
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-14 22:14:57 +00:00 |
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chloe
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a33ae9b426
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ptos/amd64: cpu: Use smaller interrupt stack for NMIs
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-14 22:11:47 +00:00 |
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chloe
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181b0fdf61
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ptos/amd64+hal: Add virtual address space forking
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-14 21:25:51 +00:00 |
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chloe
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7fa508bdf3
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ptos/amd64: cpu: Add interrupt stack for NMIs
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-14 21:04:21 +00:00 |
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chloe
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093061f2ad
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ptos/amd64: cpu: Enable interrupts after P2 init
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-14 16:39:45 -04:00 |
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chloe
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0408b34438
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ptos/amd64: cpu: Add Local APIC timer ISR stub
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-14 16:39:22 -04:00 |
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chloe
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7a2aec4e12
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ptos: ke: Add per-processor scheduler queue + PBI packer
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-14 05:57:11 +00:00 |
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chloe
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bb55a52b69
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ptos/amd64: Add task state segment
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-13 23:27:01 -04:00 |
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chloe
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4165241b6f
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stos/amd64: cpu: Add LAPIC driver + MCB in KPCR
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-13 22:26:21 -04:00 |
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chloe
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895521c510
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ptos: Initialize per-processor pool regions
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-13 18:35:39 -04:00 |
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chloe
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7a8fbe7025
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ptos/amd64: cpu: Add HalKpcrCurrent()
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-13 18:13:25 -04:00 |
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chloe
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2081b15219
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ptos/amd64+hal: intr: Add IRQL managmenet
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-13 03:54:22 +00:00 |
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chloe
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b1f30e1f72
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ptos/amd64: cpu: Add high-level interrupt registration
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-12 23:23:43 -04:00 |
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chloe
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ffe001821c
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ptos: vm: Initialize valloc range + zero pagemap lvls
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-11 20:27:07 -04:00 |
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chloe
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a9f411b750
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ptos/amd64: mmu: Zero each new pagemap level
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-11 20:16:37 -04:00 |
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chloe
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e03a6d0e91
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ptos/amd64+hal: Add page unmap interface
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-11 05:18:36 -04:00 |
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chloe
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3593c66e3d
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ptos/amd64+hal: Add page mapping interface
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-11 05:15:49 -04:00 |
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chloe
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7cb153f98c
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ptos/amd64+hal: Add interrupt handling + P1 KPCR init
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-11 04:46:00 +00:00 |
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chloe
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027074d548
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ptos/amd64: cpu: Add interrupt descriptor table
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-11 03:08:00 +00:00 |
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chloe
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eb009076b2
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ptos/amd64: mmu: Add virtual address space helpers
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-10 21:02:57 -04:00 |
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chloe
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81ee834a99
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ptos: ke: Add kernel C groundwork
Signed-off-by: Chloe M. <chloe@yiffware.org>
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2026-07-10 01:38:43 +00:00 |
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chloe
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1fb8f3368a
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ptos/amd64: cpu: Load our own GDT
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-09 21:16:18 -04:00 |
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chloe
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662252ae18
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build: Add build pipeline groundwork
Signed-off-by: Chloe M. <chloe@yiffware.org>
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2026-07-10 01:10:15 +00:00 |
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