chloe
|
2081b15219
|
ptos/amd64+hal: intr: Add IRQL managmenet
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-13 03:54:22 +00:00 |
|
chloe
|
b1f30e1f72
|
ptos/amd64: cpu: Add high-level interrupt registration
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-12 23:23:43 -04:00 |
|
chloe
|
048c479cd7
|
ptos: mm: Add page allocation helpers
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-12 22:26:59 +00:00 |
|
chloe
|
f543f28bf0
|
ptos: mm: Add virtual address descriptor allocation
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-12 19:20:15 +00:00 |
|
chloe
|
8221e33395
|
ptos: vad: Add VAD insertions and create VALLOC VADs
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-12 06:26:18 +00:00 |
|
chloe
|
41706bf188
|
ptos: hal: Add high-level interrupt interface groundwork
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-12 02:58:45 +00:00 |
|
chloe
|
70de440326
|
ptos: mm: Add virtual address descriptor defs
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-12 02:06:07 +00:00 |
|
chloe
|
ffe001821c
|
ptos: vm: Initialize valloc range + zero pagemap lvls
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 20:27:07 -04:00 |
|
chloe
|
14afdcf62e
|
ptos: mm: Add high-level page mapping interface
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-11 22:12:37 +00:00 |
|
chloe
|
e03a6d0e91
|
ptos/amd64+hal: Add page unmap interface
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 05:18:36 -04:00 |
|
chloe
|
3593c66e3d
|
ptos/amd64+hal: Add page mapping interface
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 05:15:49 -04:00 |
|
chloe
|
7cb153f98c
|
ptos/amd64+hal: Add interrupt handling + P1 KPCR init
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-11 04:46:00 +00:00 |
|
chloe
|
0f2d2b9ea5
|
ptos/amd64: lapic: Add Local APIC register defs
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 00:24:46 -04:00 |
|
chloe
|
7153b91579
|
ptos/amd64: Add i8254 driver
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 00:23:59 -04:00 |
|
chloe
|
9c91a4d8e3
|
ptos/amd64+ke: Add bugcheck support
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 00:21:45 -04:00 |
|
chloe
|
686f8daf8b
|
ptos: trace: FmtPrintf -> VFmtPrintf
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-11 00:21:29 -04:00 |
|
chloe
|
027074d548
|
ptos/amd64: cpu: Add interrupt descriptor table
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-11 03:08:00 +00:00 |
|
chloe
|
cf393eab7b
|
ptos/amd64: frame: Add assembly frame macros
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 22:45:29 -04:00 |
|
chloe
|
a29318d24b
|
ptos/amd64: Add trapframe defs
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 22:08:09 -04:00 |
|
chloe
|
38d5acbb1a
|
ptos/amd64: Add IDT gate types
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 21:10:47 -04:00 |
|
chloe
|
8c0a1da9a8
|
ptos/amd64: Add global descriptor table defs
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 21:10:30 -04:00 |
|
chloe
|
abad8f8cfe
|
ptos/amd64+hal: Add processor primitives
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 21:07:24 -04:00 |
|
chloe
|
eb009076b2
|
ptos/amd64: mmu: Add virtual address space helpers
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 21:02:57 -04:00 |
|
chloe
|
cf7a1b88b2
|
ptos/amd64: mmu: Add MMU related bit defs
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 20:59:56 -04:00 |
|
chloe
|
c3ae5ba68d
|
ptos/amd64: tlb: Add TLB operation helpers
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 20:58:44 -04:00 |
|
chloe
|
c29d8f1964
|
ptos/amd64+hal: Define the virtual address space
Signed-off-by: Chloe M <chloe@yiffware.org>
|
2026-07-10 20:31:16 -04:00 |
|
chloe
|
79bbbc074b
|
ptos: pm: Add frame allocation and reclamation
Signed-off-by: Chloe M <chloe@yiffware.org>
|
2026-07-10 19:07:11 -04:00 |
|
chloe
|
92f4720898
|
ptos: vm: Add virtual memory related macros
Signed-off-by: Chloe M <chloe@yiffware.org>
|
2026-07-10 19:06:53 -04:00 |
|
chloe
|
1c5e14f250
|
ptos: bpal: Add helper to get kernel load base
Signed-off-by: Chloe M <chloe@yiffware.org>
|
2026-07-10 19:05:23 -04:00 |
|
chloe
|
27b9d726ff
|
ptos: mm: Add physical memory groundwork
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 18:26:29 -04:00 |
|
chloe
|
7aa3c946a3
|
ptos: pm: Add page frame conversion helpers
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 18:05:21 -04:00 |
|
chloe
|
050221a0de
|
ptos: hal: Add machine specific page information
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 18:05:08 -04:00 |
|
chloe
|
128060dca0
|
ptos: bpal: Add memory map interface
Signed-off-by: Chloe M. <chloe@mensia.org>
|
2026-07-10 20:16:46 +00:00 |
|
chloe
|
1dd997b894
|
ptos/amd64: Add model specific register helpers
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 15:25:16 -04:00 |
|
chloe
|
eaa0beca91
|
ptos/amd64: Add CPUID helper macro
Signed-off-by: Chloe M <chloe@mensia.org>
|
2026-07-10 15:24:51 -04:00 |
|
chloe
|
2594613412
|
ptos: bootvid: Add boot console to bootvid
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 10:14:58 +00:00 |
|
chloe
|
912d262318
|
ptos: drivers: Add bootvid driver stub
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 06:52:38 +00:00 |
|
chloe
|
44f0afaddd
|
ptos: bpal: No need to return PT_STATUS
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 06:49:52 +00:00 |
|
chloe
|
530233c966
|
ptos: bpal: Obtain framebuffer information
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 06:29:52 +00:00 |
|
chloe
|
b88d0b0b9d
|
ptos: xt: Add printf() port
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 05:32:26 +00:00 |
|
chloe
|
d21050c1e6
|
ptos/amd64: platform: Add UART driver + HAL interface
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 05:22:51 +00:00 |
|
chloe
|
5f556df0ac
|
ptos/amd64: Add port I/O headers
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 05:16:34 +00:00 |
|
chloe
|
d8d686352d
|
ptos: ke: Add BPAL layer groundwork
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 05:09:53 +00:00 |
|
chloe
|
5e760907e1
|
ptos: Add limine bootloader interface header
Signed-off-by: Chloe M. <chloe@yiffware.org>
|
2026-07-10 01:45:58 +00:00 |
|