/* * Copyright (c) 2026, Chloe M. * Provided under the BSD-3 clause. * * Description: AMD64 interrupt gate management * Author: Chloe M. */ #ifndef _MACHINE_IDT_H_ #define _MACHINE_IDT_H_ 1 #include /* Interrupt gate types */ #define IDT_INT_GATE 0x8E #define IDT_TRAP_GATE 0x8F #define IDT_USER_GATE 0xEE /* * Represents an interupt gate descriptor * * Refer to section 6.14.1 of the Intel SDM */ typedef struct { USHORT OffsetLow16; USHORT SegmentSel; UCHAR Ist : 3; UCHAR Zero : 5; UCHAR Type : 4; UCHAR Zero1 : 1; UCHAR Dpl : 2; UCHAR Present : 1; USHORT OffsetMid16; ULONG OffsetHigh32; ULONG Reserved; } IDT_GATE; /* * Refers to the base and limit of the interrupt * descriptor table. * * Refer to section 6.10 of the Intel SDM */ typedef struct PACKED { USHORT Limit; UQUAD Offset; } IDTR; /* * Set an interrupt descriptor table gate * * @Vector: Interrupt vector to set * @Offset: Offset of interrupt service routine * @Type: Interrupt gate type * @Ist: Interrupt stack table index */ VOID MdIdtSetGate(UCHAR Vector, UPTR Offset, UCHAR Type, UCHAR Ist); /* * Load the interrupt descriptor table * * XXX: This must be called once per processor */ VOID MdIdtLoad(VOID); #endif /* !_MACHINE_IDT_H_ */