 chloe
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b1f30e1f72
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ptos/amd64: cpu: Add high-level interrupt registration
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-12 23:23:43 -04:00 |
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chloe
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41706bf188
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ptos: hal: Add high-level interrupt interface groundwork
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-12 02:58:45 +00:00 |
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chloe
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e03a6d0e91
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ptos/amd64+hal: Add page unmap interface
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-11 05:18:36 -04:00 |
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chloe
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3593c66e3d
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ptos/amd64+hal: Add page mapping interface
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-11 05:15:49 -04:00 |
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chloe
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7cb153f98c
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ptos/amd64+hal: Add interrupt handling + P1 KPCR init
Signed-off-by: Chloe M. <chloe@mensia.org>
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2026-07-11 04:46:00 +00:00 |
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chloe
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abad8f8cfe
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ptos/amd64+hal: Add processor primitives
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-10 21:07:24 -04:00 |
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chloe
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eb009076b2
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ptos/amd64: mmu: Add virtual address space helpers
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-10 21:02:57 -04:00 |
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chloe
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c29d8f1964
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ptos/amd64+hal: Define the virtual address space
Signed-off-by: Chloe M <chloe@yiffware.org>
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2026-07-10 20:31:16 -04:00 |
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chloe
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050221a0de
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ptos: hal: Add machine specific page information
Signed-off-by: Chloe M <chloe@mensia.org>
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2026-07-10 18:05:08 -04:00 |
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chloe
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d21050c1e6
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ptos/amd64: platform: Add UART driver + HAL interface
Signed-off-by: Chloe M. <chloe@yiffware.org>
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2026-07-10 05:22:51 +00:00 |
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