ptos/amd64: cpu: Add high-level interrupt registration

Signed-off-by: Chloe M <chloe@mensia.org>
2026-07-12 23:23:43 -04:00
parent 048c479cd7
commit b1f30e1f72
3 changed files with 85 additions and 0 deletions
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2026, Chloe M.
+ * Provided under the BSD-3 clause.
+ *
+ * Description: High-level interrupt management
+ * Author:      Chloe M.
+ */
+
+#ifndef _MACHINE_INTR_H_
+#define _MACHINE_INTR_H_ 1
+
+/* Interrupt priority class shift operand */
+#define IPRI_CLASS_SHIFT 4
+
+#endif  /* !_MACHINE_INTR_H_ */