From 7fa508bdf35375a80ad6e47150959b482cf51c07 Mon Sep 17 00:00:00 2001
From: "Chloe M." <chloe@mensia.org>
Date: Tue, 14 Jul 2026 21:04:21 +0000
Subject: [PATCH] ptos/amd64: cpu: Add interrupt stack for NMIs

Signed-off-by: Chloe M. <chloe@mensia.org>
---
 service/ptos/arch/amd64/cpu/init.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/service/ptos/arch/amd64/cpu/init.c b/service/ptos/arch/amd64/cpu/init.c
index 98de16d..0454beb 100644
--- a/service/ptos/arch/amd64/cpu/init.c
+++ b/service/ptos/arch/amd64/cpu/init.c
@@ -7,6 +7,7 @@
  */
 
 #include <hal/kpcr.h>
+#include <hal/page.h>
 #include <ke/bugcheck.h>
 #include <machine/idt.h>
 #include <machine/trap.h>
@@ -25,7 +26,7 @@ InitInterrupts(VOID)
 {
     MdIdtSetGate(0x00, (UPTR)TrapDivError, IDT_TRAP_GATE, 0);
     MdIdtSetGate(0x01, (UPTR)TrapDebugException, IDT_TRAP_GATE, 0);
-    MdIdtSetGate(0x02, (UPTR)TrapNmi, IDT_TRAP_GATE, 0);
+    MdIdtSetGate(0x02, (UPTR)TrapNmi, IDT_TRAP_GATE, IST_NMI);
     MdIdtSetGate(0x03, (UPTR)TrapBreakPoint, IDT_TRAP_GATE, 0);
     MdIdtSetGate(0x04, (UPTR)TrapOverflow, IDT_TRAP_GATE, 0);
     MdIdtSetGate(0x05, (UPTR)TrapBoundRange, IDT_TRAP_GATE, 0);
@@ -89,6 +90,9 @@ HalKpcrP2Init(KPCR *Kpcr)
         : "memory"
     );
 
+    /* Setup interrupt stacks */
+    MdTssAllocIst(IST_NMI, PAGESIZE);
+
     /* Initialize the scheduler queue */
     SCHED_QUEUE_INIT(&Kpcr->SchedQueue);