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ptos/amd64+hal: Add interrupt handling + P1 KPCR init

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Signed-off-by: Chloe M. <chloe@mensia.org>
This commit is contained in:
Chloe M.
2026-07-11 04:46:00 +00:00
parent 0f2d2b9ea5
commit 7cb153f98c
7 changed files with 335 additions and 3 deletions
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service/ptos/arch/amd64/cpu/init.c
+41
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/*
* Copyright (c) 2026, Chloe M.
* Provided under the BSD-3 clause.
*
* Description: Kernel processor control region
* Author: Chloe M.
*/
#include <hal/kpcr.h>
#include <machine/idt.h>
#include <machine/trap.h>
/*
* Initialize interrupts for the current processor
*/
static VOID
InitInterrupts(VOID)
{
MdIdtSetGate(0x00, (UPTR)TrapDivError, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x01, (UPTR)TrapDebugException, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x02, (UPTR)TrapNmi, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x03, (UPTR)TrapBreakPoint, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x04, (UPTR)TrapOverflow, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x05, (UPTR)TrapBoundRange, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x06, (UPTR)TrapInvalidOpcode, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x07, (UPTR)TrapNoCoprocessor, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x08, (UPTR)TrapDoubleFault, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x09, (UPTR)TrapReserved, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x0A, (UPTR)TrapInvalidTss, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x0B, (UPTR)TrapSegNotPresent, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x0C, (UPTR)TrapStackSegmentFault, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x0D, (UPTR)TrapGeneralProtection, IDT_TRAP_GATE, 0);
MdIdtSetGate(0x0E, (UPTR)TrapPageFault, IDT_TRAP_GATE, 0);
MdIdtLoad();
}
VOID
HalKpcrP1Init(KPCR *Kpcr)
{
InitInterrupts();
}