From 5e760907e1726352c2ee954ae7e7fe9ff729bbe9 Mon Sep 17 00:00:00 2001 From: "Chloe M." Date: Fri, 10 Jul 2026 01:45:58 +0000 Subject: [PATCH] ptos: Add limine bootloader interface header Signed-off-by: Chloe M. --- service/ptos/head/lib/limine.h | 669 +++++++++++++++++++++++++++++++++ 1 file changed, 669 insertions(+) create mode 100644 service/ptos/head/lib/limine.h diff --git a/service/ptos/head/lib/limine.h b/service/ptos/head/lib/limine.h new file mode 100644 index 0000000..cd9752a --- /dev/null +++ b/service/ptos/head/lib/limine.h @@ -0,0 +1,669 @@ +/* SPDX-License-Identifier: 0BSD */ + +/* Copyright (C) 2022-2026 Mintsuki and contributors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef LIMINE_H +#define LIMINE_H 1 + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Misc */ + +#ifdef LIMINE_NO_POINTERS +# define LIMINE_PTR(TYPE) UQUAD +#else +# define LIMINE_PTR(TYPE) TYPE +#endif + +#define LIMINE_REQUESTS_START_MARKER { 0xf6b8f4b39de7d1ae, 0xfab91a6940fcb9cf, \ + 0x785c6ed015d3e316, 0x181e920a7852b9d9 } +#define LIMINE_REQUESTS_END_MARKER { 0xadc0e0531bb10d03, 0x9572709f31764c62 } + +#define LIMINE_BASE_REVISION(N) { 0xf9562b2d5c95a6c8, 0x6a7b384944536bdc, (N) } + +#define LIMINE_BASE_REVISION_SUPPORTED(VAR) ((VAR)[2] == 0) + +#define LIMINE_LOADED_BASE_REVISION_VALID(VAR) ((VAR)[1] != 0x6a7b384944536bdc) +#define LIMINE_LOADED_BASE_REVISION(VAR) ((VAR)[1]) + +#define LIMINE_COMMON_MAGIC 0xc7b1dd30df4c8b88, 0x0a82e883a194f07b + +struct limine_uuid { + ULONG a; + USHORT b; + USHORT c; + UCHAR d[8]; +}; + +#define LIMINE_MEDIA_TYPE_GENERIC 0 +#define LIMINE_MEDIA_TYPE_OPTICAL 1 +#define LIMINE_MEDIA_TYPE_TFTP 2 + +struct limine_file { + UQUAD revision; + LIMINE_PTR(VOID *) address; + UQUAD size; + LIMINE_PTR(CHAR *) path; + LIMINE_PTR(CHAR *) string; + ULONG media_type; + ULONG unused; + UCHAR tftp_ipv4[4]; + ULONG tftp_port; + ULONG partition_index; + ULONG mbr_disk_id; + struct limine_uuid gpt_disk_uuid; + struct limine_uuid gpt_part_uuid; + struct limine_uuid part_uuid; +}; + +/* Boot info */ + +#define LIMINE_BOOTLOADER_INFO_REQUEST_ID { LIMINE_COMMON_MAGIC, 0xf55038d8e2a1202f, 0x279426fcf5f59740 } + +struct limine_bootloader_info_response { + UQUAD revision; + LIMINE_PTR(CHAR *) name; + LIMINE_PTR(CHAR *) version; +}; + +struct limine_bootloader_info_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_bootloader_info_response *) response; +}; + +/* Executable command line */ + +#define LIMINE_EXECUTABLE_CMDLINE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x4b161536e598651e, 0xb390ad4a2f1f303a } + +struct limine_executable_cmdline_response { + UQUAD revision; + LIMINE_PTR(CHAR *) cmdline; +}; + +struct limine_executable_cmdline_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_executable_cmdline_response *) response; +}; + +/* Firmware type */ + +#define LIMINE_FIRMWARE_TYPE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x8c2f75d90bef28a8, 0x7045a4688eac00c3 } + +#define LIMINE_FIRMWARE_TYPE_X86BIOS 0 +#define LIMINE_FIRMWARE_TYPE_EFI32 1 +#define LIMINE_FIRMWARE_TYPE_EFI64 2 +#define LIMINE_FIRMWARE_TYPE_SBI 3 + +struct limine_firmware_type_response { + UQUAD revision; + UQUAD firmware_type; +}; + +struct limine_firmware_type_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_firmware_type_response *) response; +}; + +/* Stack size */ + +#define LIMINE_STACK_SIZE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x224ef0460a8e8926, 0xe1cb0fc25f46ea3d } + +struct limine_stack_size_response { + UQUAD revision; +}; + +struct limine_stack_size_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_stack_size_response *) response; + UQUAD stack_size; +}; + +/* HHDM */ + +#define LIMINE_HHDM_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x48dcf1cb8ad2b852, 0x63984e959a98244b } + +struct limine_hhdm_response { + UQUAD revision; + UQUAD offset; +}; + +struct limine_hhdm_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_hhdm_response *) response; +}; + +/* Framebuffer */ + +#define LIMINE_FRAMEBUFFER_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x9d5827dcd881dd75, 0xa3148604f6fab11b } + +#define LIMINE_FRAMEBUFFER_RGB 1 + +struct limine_video_mode { + UQUAD pitch; + UQUAD width; + UQUAD height; + USHORT bpp; + UCHAR memory_model; + UCHAR red_mask_size; + UCHAR red_mask_shift; + UCHAR green_mask_size; + UCHAR green_mask_shift; + UCHAR blue_mask_size; + UCHAR blue_mask_shift; +}; + +struct limine_framebuffer { + LIMINE_PTR(VOID *) address; + UQUAD width; + UQUAD height; + UQUAD pitch; + USHORT bpp; + UCHAR memory_model; + UCHAR red_mask_size; + UCHAR red_mask_shift; + UCHAR green_mask_size; + UCHAR green_mask_shift; + UCHAR blue_mask_size; + UCHAR blue_mask_shift; + UCHAR unused[7]; + UQUAD edid_size; + LIMINE_PTR(VOID *) edid; + /* Response revision 1 */ + UQUAD mode_count; + LIMINE_PTR(struct limine_video_mode **) modes; +}; + +struct limine_framebuffer_response { + UQUAD revision; + UQUAD framebuffer_count; + LIMINE_PTR(struct limine_framebuffer **) framebuffers; +}; + +struct limine_framebuffer_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_framebuffer_response *) response; +}; + +/* Flanterm FB init params */ + +#define LIMINE_FLANTERM_FB_INIT_PARAMS_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x3259399fe7c5f126, 0xe01c1c8c5db9d1a9 } + +#define LIMINE_FLANTERM_FB_ROTATE_0 0 +#define LIMINE_FLANTERM_FB_ROTATE_90 1 +#define LIMINE_FLANTERM_FB_ROTATE_180 2 +#define LIMINE_FLANTERM_FB_ROTATE_270 3 + +struct limine_flanterm_fb_init_params { + LIMINE_PTR(ULONG *) canvas; + UQUAD canvas_size; + ULONG ansi_colours[8]; + ULONG ansi_bright_colours[8]; + ULONG default_bg; + ULONG default_fg; + ULONG default_bg_bright; + ULONG default_fg_bright; + LIMINE_PTR(VOID *) font; + UQUAD font_width; + UQUAD font_height; + UQUAD font_spacing; + UQUAD font_scale_x; + UQUAD font_scale_y; + UQUAD margin; + UQUAD rotation; +}; + +struct limine_flanterm_fb_init_params_response { + UQUAD revision; + UQUAD entry_count; + LIMINE_PTR(struct limine_flanterm_fb_init_params **) entries; +}; + +struct limine_flanterm_fb_init_params_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_flanterm_fb_init_params_response *) response; +}; + +/* Paging mode */ + +#define LIMINE_PAGING_MODE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x95c1a0edab0944cb, 0xa4e5cb3842f7488a } + +#define LIMINE_PAGING_MODE_X86_64_4LVL 0 +#define LIMINE_PAGING_MODE_X86_64_5LVL 1 +#define LIMINE_PAGING_MODE_X86_64_MIN LIMINE_PAGING_MODE_X86_64_4LVL +#define LIMINE_PAGING_MODE_X86_64_DEFAULT LIMINE_PAGING_MODE_X86_64_4LVL + +#define LIMINE_PAGING_MODE_AARCH64_4LVL 0 +#define LIMINE_PAGING_MODE_AARCH64_5LVL 1 +#define LIMINE_PAGING_MODE_AARCH64_MIN LIMINE_PAGING_MODE_AARCH64_4LVL +#define LIMINE_PAGING_MODE_AARCH64_DEFAULT LIMINE_PAGING_MODE_AARCH64_4LVL + +#define LIMINE_PAGING_MODE_RISCV_SV39 0 +#define LIMINE_PAGING_MODE_RISCV_SV48 1 +#define LIMINE_PAGING_MODE_RISCV_SV57 2 +#define LIMINE_PAGING_MODE_RISCV_MIN LIMINE_PAGING_MODE_RISCV_SV39 +#define LIMINE_PAGING_MODE_RISCV_DEFAULT LIMINE_PAGING_MODE_RISCV_SV48 + +#define LIMINE_PAGING_MODE_LOONGARCH_4LVL 0 +#define LIMINE_PAGING_MODE_LOONGARCH_MIN LIMINE_PAGING_MODE_LOONGARCH_4LVL +#define LIMINE_PAGING_MODE_LOONGARCH_DEFAULT LIMINE_PAGING_MODE_LOONGARCH_4LVL + +struct limine_paging_mode_response { + UQUAD revision; + UQUAD mode; +}; + +struct limine_paging_mode_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_paging_mode_response *) response; + UQUAD mode; + UQUAD max_mode; + UQUAD min_mode; +}; + +/* MP */ + +#define LIMINE_MP_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x95a67b819a1b857e, 0xa0b61b723b6a73e0 } + +struct limine_mp_info; + +typedef VOID (*limine_goto_address)(struct limine_mp_info *); + +#if defined (__x86_64__) || defined (__i386__) + +#define LIMINE_MP_RESPONSE_X86_64_X2APIC (1 << 0) + +struct limine_mp_info { + ULONG processor_id; + ULONG lapic_id; + UQUAD reserved; + LIMINE_PTR(limine_goto_address) goto_address; + UQUAD extra_argument; +}; + +struct limine_mp_response { + UQUAD revision; + ULONG flags; + ULONG bsp_lapic_id; + UQUAD cpu_count; + LIMINE_PTR(struct limine_mp_info **) cpus; +}; + +#elif defined (__aarch64__) + +struct limine_mp_info { + ULONG processor_id; + ULONG reserved1; + UQUAD mpidr; + UQUAD reserved; + LIMINE_PTR(limine_goto_address) goto_address; + UQUAD extra_argument; +}; + +struct limine_mp_response { + UQUAD revision; + UQUAD flags; + UQUAD bsp_mpidr; + UQUAD cpu_count; + LIMINE_PTR(struct limine_mp_info **) cpus; +}; + +#elif defined (__riscv) && (__riscv_xlen == 64) + +struct limine_mp_info { + UQUAD processor_id; + UQUAD hartid; + UQUAD reserved; + LIMINE_PTR(limine_goto_address) goto_address; + UQUAD extra_argument; +}; + +struct limine_mp_response { + UQUAD revision; + UQUAD flags; + UQUAD bsp_hartid; + UQUAD cpu_count; + LIMINE_PTR(struct limine_mp_info **) cpus; +}; + +#elif defined (__loongarch__) && (__loongarch_grlen == 64) + +struct limine_mp_info { + UQUAD processor_id; + UQUAD phys_id; + UQUAD reserved; + LIMINE_PTR(limine_goto_address) goto_address; + UQUAD extra_argument; +}; + +struct limine_mp_response { + UQUAD revision; + UQUAD flags; + UQUAD bsp_phys_id; + UQUAD cpu_count; + LIMINE_PTR(struct limine_mp_info **) cpus; +}; + +#else +#error Unknown architecture +#endif + +#define LIMINE_MP_REQUEST_X86_64_X2APIC (1 << 0) + +struct limine_mp_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_mp_response *) response; + UQUAD flags; +}; + +/* Memory map */ + +#define LIMINE_MEMMAP_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x67cf3d9d378a806f, 0xe304acdfc50c3c62 } + +#define LIMINE_MEMMAP_USABLE 0 +#define LIMINE_MEMMAP_RESERVED 1 +#define LIMINE_MEMMAP_ACPI_RECLAIMABLE 2 +#define LIMINE_MEMMAP_ACPI_NVS 3 +#define LIMINE_MEMMAP_BAD_MEMORY 4 +#define LIMINE_MEMMAP_BOOTLOADER_RECLAIMABLE 5 +#define LIMINE_MEMMAP_EXECUTABLE_AND_MODULES 6 +#define LIMINE_MEMMAP_FRAMEBUFFER 7 +#define LIMINE_MEMMAP_RESERVED_MAPPED 8 + +struct limine_memmap_entry { + UQUAD base; + UQUAD length; + UQUAD type; +}; + +struct limine_memmap_response { + UQUAD revision; + UQUAD entry_count; + LIMINE_PTR(struct limine_memmap_entry **) entries; +}; + +struct limine_memmap_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_memmap_response *) response; +}; + +/* Entry point */ + +#define LIMINE_ENTRY_POINT_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x13d86c035a1cd3e1, 0x2b0caa89d8f3026a } + +typedef VOID (*limine_entry_point)(VOID); + +struct limine_entry_point_response { + UQUAD revision; +}; + +struct limine_entry_point_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_entry_point_response *) response; + LIMINE_PTR(limine_entry_point) entry; +}; + +/* Executable File */ + +#define LIMINE_EXECUTABLE_FILE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0xad97e90e83f1ed67, 0x31eb5d1c5ff23b69 } + +struct limine_executable_file_response { + UQUAD revision; + LIMINE_PTR(struct limine_file *) executable_file; +}; + +struct limine_executable_file_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_executable_file_response *) response; +}; + +/* Module */ + +#define LIMINE_MODULE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x3e7e279702be32af, 0xca1c4f3bd1280cee } + +#define LIMINE_INTERNAL_MODULE_REQUIRED (1 << 0) +#define LIMINE_INTERNAL_MODULE_COMPRESSED (1 << 1) + +struct limine_internal_module { + LIMINE_PTR(const CHAR *) path; + LIMINE_PTR(const CHAR *) string; + UQUAD flags; +}; + +struct limine_module_response { + UQUAD revision; + UQUAD module_count; + LIMINE_PTR(struct limine_file **) modules; +}; + +struct limine_module_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_module_response *) response; + + /* Request revision 1 */ + UQUAD internal_module_count; + LIMINE_PTR(struct limine_internal_module **) internal_modules; +}; + +/* RSDP */ + +#define LIMINE_RSDP_REQUEST_ID { LIMINE_COMMON_MAGIC, 0xc5e77b6b397e7b43, 0x27637845accdcf3c } + +struct limine_rsdp_response { + UQUAD revision; + LIMINE_PTR(VOID *) address; +}; + +struct limine_rsdp_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_rsdp_response *) response; +}; + +/* SMBIOS */ + +#define LIMINE_SMBIOS_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x9e9046f11e095391, 0xaa4a520fefbde5ee } + +struct limine_smbios_response { + UQUAD revision; + LIMINE_PTR(VOID *) entry_32; + LIMINE_PTR(VOID *) entry_64; +}; + +struct limine_smbios_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_smbios_response *) response; +}; + +/* EFI system table */ + +#define LIMINE_EFI_SYSTEM_TABLE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x5ceba5163eaaf6d6, 0x0a6981610cf65fcc } + +struct limine_efi_system_table_response { + UQUAD revision; + LIMINE_PTR(VOID *) address; +}; + +struct limine_efi_system_table_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_efi_system_table_response *) response; +}; + +/* TPM event log */ + +#define LIMINE_TPM_EVENT_LOG_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x98e094fc7e76e979, 0xee8d8775c54e1d1f } + +#define LIMINE_TPM_EVENT_LOG_FORMAT_TCG_1_2 1 +#define LIMINE_TPM_EVENT_LOG_FORMAT_TCG_2 2 + +struct limine_tpm_event_log_response { + UQUAD revision; + UQUAD format; + UQUAD size; + LIMINE_PTR(VOID *) address; +}; + +struct limine_tpm_event_log_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_tpm_event_log_response *) response; +}; + +/* EFI memory map */ + +#define LIMINE_EFI_MEMMAP_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x7df62a431d6872d5, 0xa4fcdfb3e57306c8 } + +struct limine_efi_memmap_response { + UQUAD revision; + LIMINE_PTR(VOID *) memmap; + UQUAD memmap_size; + UQUAD desc_size; + UQUAD desc_version; +}; + +struct limine_efi_memmap_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_efi_memmap_response *) response; +}; + +/* Date at boot */ + +#define LIMINE_DATE_AT_BOOT_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x502746e184c088aa, 0xfbc5ec83e6327893 } + +struct limine_date_at_boot_response { + UQUAD revision; + QUAD timestamp; +}; + +struct limine_date_at_boot_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_date_at_boot_response *) response; +}; + +/* Executable address */ + +#define LIMINE_EXECUTABLE_ADDRESS_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x71ba76863cc55f63, 0xb2644a48c516a487 } + +struct limine_executable_address_response { + UQUAD revision; + UQUAD physical_base; + UQUAD virtual_base; +}; + +struct limine_executable_address_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_executable_address_response *) response; +}; + +/* Device Tree Blob */ + +#define LIMINE_DTB_REQUEST_ID { LIMINE_COMMON_MAGIC, 0xb40ddb48fb54bac7, 0x545081493f81ffb7 } + +struct limine_dtb_response { + UQUAD revision; + LIMINE_PTR(VOID *) dtb_ptr; +}; + +struct limine_dtb_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_dtb_response *) response; +}; + +/* RISC-V Boot Hart ID */ + +#define LIMINE_RISCV_BSP_HARTID_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x1369359f025525f9, 0x2ff2a56178391bb6 } + +struct limine_riscv_bsp_hartid_response { + UQUAD revision; + UQUAD bsp_hartid; +}; + +struct limine_riscv_bsp_hartid_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_riscv_bsp_hartid_response *) response; +}; + +/* Bootloader Performance */ + +#define LIMINE_BOOTLOADER_PERFORMANCE_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x6b50ad9bf36d13ad, 0xdc4c7e88fc759e17 } + +struct limine_bootloader_performance_response { + UQUAD revision; + UQUAD reset_usec; + UQUAD init_usec; + UQUAD exec_usec; +}; + +struct limine_bootloader_performance_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_bootloader_performance_response *) response; +}; + +#define LIMINE_X86_64_KEEP_IOMMU_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x8ebaabe51f490179, 0x2aa86a59ffb4ab0f } + +struct limine_x86_64_keep_iommu_response { + UQUAD revision; +}; + +struct limine_x86_64_keep_iommu_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_x86_64_keep_iommu_response *) response; +}; + +/* TSC (Timestamp Counter) Frequency */ + +#define LIMINE_TSC_FREQUENCY_REQUEST_ID { LIMINE_COMMON_MAGIC, 0x10f2ee1d87d195e4, 0xf747a2b78f6ddb31 } + +struct limine_tsc_frequency_response { + UQUAD revision; + UQUAD frequency; +}; + +struct limine_tsc_frequency_request { + UQUAD id[4]; + UQUAD revision; + LIMINE_PTR(struct limine_tsc_frequency_response *) response; +}; + +#ifdef __cplusplus +} +#endif + +#endif